spi: altera: Add short note about EPCS/EPCQx1

Add short documentation-alike note on how to use the Altera SPI
driver with the EPCS/EPCQx1 FPGA IP block on SoCFPGA Cyclone V
into doc/SPI/README.altera_spi

Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: Jagannadha Sutradharudu Teki <[email protected]>
Acked-by: Pavel Machek <[email protected]>
Reviewed-by: Jagannadha Sutradharudu Teki <[email protected]>

diff --git a/doc/SPI/README.altera_spi b/doc/SPI/README.altera_spi
new file mode 100644 (file)
index 0000000..b07449f
--- /dev/null
+++ b/doc/SPI/README.altera_spi
@@ -0,0 +1,6 @@
+SoCFPGA EPCS/EPCQx1 mini howto:
+- Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild
+- The controller base address is the "Base" in QSys + 0x400
+- Set MSEL[4:0]=10010 (AS Standard)
+- Load the bitstream into FPGA, enable bridges
+- Only then will the driver work